Technical Field
The present invention generally relates to semiconductor processing, and more particularly to devices and methods having a unipolar spacer to better protect fins and surrounding materials during etch processes.
Description of the Related Art
With the continued scaling down of complementary metal oxide semiconductor (CMOS) devices, narrower dimensions begin to cause additional challenges. For example, cladding epitaxy is needed for channel strain retention. Cladding epitaxy for an epitaxial region surrounds fins employed in fin field effect transistor (finFET) devices. Since pitches between structures are smaller, spacers formed on sidewalls of the gate structures are easier to pinch-off in the fin regions. This means that the spacer material does not get all the way to the base of the fins. This leads to fin erosion (e.g., fin height erosion) and erosion (e.g., gouging) of shallow trench isolation regions (STIs) at or near the base of the fins due to spacer etch back around the fin. This also results in leaving spacer residue, which blocks epitaxial growth of the cladding epitaxy that forms source and drain regions.